Hi, On Mon 02 Nov 20, 11:12, Maxime Ripard wrote: > On Sat, Oct 31, 2020 at 07:21:34PM +0100, Paul Kocialkowski wrote: > > The V3s/V3 has a NMI interrupt controller, mainly used for the AXP209. > > Its address follows the sytsem controller block, which was previously > > incorrectly described as spanning over 0x1000 address bytes. > > Is it after, or right in the middle of it? That's up for interpretation actually: - The V3 datasheet mentions that System Control is 0x01C00000 --- 0x01C00FFF; - In practice, sunxi_sram.c uses a regmap with max_reg set to 0x30 for the V3s/H3 so this gives us some room. Looking at other SoCs with the same setup (take sun8i-r40 for instance), system-control is limited to 0x30 and the NMI controller follows it. In the case of R40, the SRAM controlled is also said to be 4K-long in the Allwinner docs. So all in all, this leads me to believe that the system-controller instance stops well before 0x1c000d0 on the V3s as well. Otherwise, we should also make the R40 consistent. Cheers, Paul -- Developer of free digital technology and hardware support. Website: https://www.paulk.fr/ Coding blog: https://code.paulk.fr/ Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/
