On Sat, Oct 31, 2020 at 07:21:33PM +0100, Paul Kocialkowski wrote: > The V3s/V3 has a NMI IRQ controller, which is mainly used for the AXP209 > interrupt. In great wisdom, Allwinner decided to invert the enable and > pending register offsets, compared to the A20. > > As a result, a specific compatible and register description is required > for the V3s. This was tested with an AXP209 on a V3 board. > > Signed-off-by: Paul Kocialkowski <contact@xxxxxxxx> Acked-by: Maxime Ripard <mripard@xxxxxxxxxx> Maxime
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