Re: [PATCH] arm64: dts: imx8mm: Add support for micfil

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On Tue, May 19, 2020 at 8:03 PM Shawn Guo <shawnguo@xxxxxxxxxx> wrote:
>
> On Sat, May 02, 2020 at 07:59:48AM -0500, Adam Ford wrote:
> > The i.MX8M Mini has supports the MICFIL digital interface.
> > It's a 16-bit audio signal from a PDM microphone bitstream.
> > The driver is already in the kernel, but the node is missing.
> >
> > This patch adds the micfil node.
> >
> > Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index c63685ae80ee..d46e727fc362 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -339,6 +339,25 @@ sai6: sai@30060000 {
> >                               status = "disabled";
> >                       };
> >
> > +                     micfil: micfil@30080000 {
>
> Find a generic node name, audio-controller maybe?

The SAI's nodes are called SAI@xxxx

If that's a deal-breaker, I can push a V3.

I didn't see anyone from the device tree side comment, and the device
tree binding doc states 'micfil@xxxxxx' so I used what was documented
in the fsl,micfil.txt

adam
>
> Shawn
>
> > +                             compatible = "fsl,imx8mm-micfil";
> > +                             reg = <0x30080000 0x10000>;
> > +                             interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
> > +                                          <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
> > +                                          <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> > +                                          <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> > +                             clocks = <&clk IMX8MM_CLK_PDM_IPG>,
> > +                                      <&clk IMX8MM_CLK_PDM_ROOT>,
> > +                                      <&clk IMX8MM_AUDIO_PLL1_OUT>,
> > +                                      <&clk IMX8MM_AUDIO_PLL2_OUT>,
> > +                                      <&clk IMX8MM_CLK_EXT3>;
> > +                             clock-names = "ipg_clk", "ipg_clk_app",
> > +                                           "pll8k", "pll11k", "clkext3";
> > +                             dmas = <&sdma2 24 25 0x80000000>;
> > +                             dma-names = "rx";
> > +                             status = "disabled";
> > +                     };
> > +
> >                       gpio1: gpio@30200000 {
> >                               compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio";
> >                               reg = <0x30200000 0x10000>;
> > --
> > 2.25.1
> >



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