Subject: [PATCH net 1/4] net:phy:smsc: enable PHY_RST_AFTER_CLK_EN if ref clock is not set Description: for compatibility, restore PHY_RST_AFTER_CLK_EN flag for LAN8720, but clear it if the driver successfully retrieves a reference to the ref clk. This ensures compatibility for systems that rely on the PHY reset workaround, but fail to update their DT with the 'clocks' property for SMSC PHY. Signed-off-by: Laurent Badel <laurentbadel@xxxxxxxxx> Fixes: d65af21842f8 ("net: phy: smsc: LAN8710/20: remove PHY_RST_AFTER_CLK_EN flag") --- drivers/net/phy/smsc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c index ec97669be5c2..321ed2a89045 100644 --- a/drivers/net/phy/smsc.c +++ b/drivers/net/phy/smsc.c @@ -294,6 +294,9 @@ static int smsc_phy_probe(struct phy_device *phydev) if (ret) return ret; + if (priv->refclk) + phydev->drv->flags &= ~PHY_RST_AFTER_CLK_EN; + return 0; } @@ -397,7 +400,7 @@ static struct phy_driver smsc_phy_driver[] = { .name = "SMSC LAN8710/LAN8720", /* PHY_BASIC_FEATURES */ - + .flags = PHY_RST_AFTER_CLK_EN, .probe = smsc_phy_probe, .remove = smsc_phy_remove, -- 2.17.1 ----------------------------- Eaton Industries Manufacturing GmbH ~ Registered place of business: Route de la Longeraie 7, 1110, Morges, Switzerland -----------------------------