There are some nuances to their address and size, so lets try document
that a bit better to reveal the hole between the reserved memory for the
LPC FW cycle bridge and the reserved memory for the VGA device.
Signed-off-by: Andrew Jeffery <andrew@xxxxxxxx>
---
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 4 ++++
arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 136ff156a512..802027a3c43c 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -47,11 +47,15 @@ reserved-memory {
#size-cells = <1>;
ranges;
+ /* LPC FW cycle bridge region requires natural alignment */
flash_memory: region@B8000000 {
no-map;
reg = <0xB8000000 0x04000000>; /* 64M */
};
+ /* 48MB region from the end of flash to start of vga memory */
+
+ /* VGA region is dictated by hardware strapping */
vga_memory: region@bf000000 {
no-map;
compatible = "shared-dma-pool";
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
index 52f5876c08cf..09b561429579 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
@@ -26,11 +26,15 @@ reserved-memory {
#size-cells = <1>;
ranges;
+ /* LPC FW cycle bridge region requires natural alignment */
flash_memory: region@b8000000 {
no-map;
reg = <0xb8000000 0x04000000>; /* 64M */
};
+ /* 48MB region from the end of flash to start of vga memory */
+
+ /* VGA region is dictated by hardware strapping */
vga_memory: region@bf000000 {
no-map;
compatible = "shared-dma-pool";
--
2.25.1
