Tweak the DDR/L3 bandwidth votes on the lite variant of the SC7180 SoC
since the gold cores only support frequencies upto 2.1 GHz.
Signed-off-by: Sibi Sankar <sibis@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sc7180-lite.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sc7180-lite.dtsi
diff --git a/arch/arm64/boot/dts/qcom/sc7180-lite.dtsi b/arch/arm64/boot/dts/qcom/sc7180-lite.dtsi
new file mode 100644
index 000000000000..cff50275cfe1
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc7180-lite.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * SC7180 lite device tree source
+ *
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ */
+
+&cpu6_opp11 {
+ opp-peak-kBps = <8532000 22425600>;
+};
+
+&cpu6_opp12 {
+ opp-peak-kBps = <8532000 23347200>;
+};
--
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