On Tue, 13 Oct 2020 14:50:31 +0200, Sascha Hauer wrote: > The ARM Cortex-A53 and A57 CPUs support error detection for the L1/L2 > caches. This patch adds a binding for the corresponding driver. > > Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> > --- > .../bindings/edac/arm,cortex-a5x-edac.yaml | 32 +++++++++++++++++++ > 1 file changed, 32 insertions(+) > create mode 100644 Documentation/devicetree/bindings/edac/arm,cortex-a5x-edac.yaml > My bot found errors running 'make dt_binding_check' on your patch: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/edac/arm,cortex-a5x-edac.yaml: 'maintainers' is a required property /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/edac/arm,cortex-a5x-edac.yaml: ignoring, error in schema: warning: no schema found in file: ./Documentation/devicetree/bindings/edac/arm,cortex-a5x-edac.yaml See https://patchwork.ozlabs.org/patch/1381567 If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure dt-schema is up to date: pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade Please check and re-submit.
