On Thu, 8 Oct 2020, Ben Levinsky wrote: > > Does it mean that the main CPU see the memory of the > > R5 as "some kind of TCM" and that TCM is physically > > mapped at 0xffe00000 (ITCM) and 0xffe20000 (DTCM)? > > > > If the first is ITCM and the second DTCM that is pretty > > important to point out, since this reflects the harvard > > architecture properties of these two memory areas. Hi Linus, I don't think Xilinx TCMs are split in ITCM and DTCM in the way you describe here: https://www.kernel.org/doc/Documentation/arm/tcm.txt. Either TCM could be used for anything. See https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf at page 82.
