This is a note to let you know that I've just added the patch titled
dt-bindings: phy: qcom,qmp-usb3-dp: Add DP phy information
to my usb git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
in the usb-testing branch.
The patch will show up in the next release of the linux-next tree
(usually sometime within the next 24 hours during the week.)
The patch will be merged to the usb-next branch sometime soon,
after it passes testing, and the merge window is open.
If you have any questions about this process, please let me know.
>From 724fabf5df1342eae363fd3bfc091b5d160225d3 Mon Sep 17 00:00:00 2001
From: Stephen Boyd <swboyd@xxxxxxxxxxxx>
Date: Wed, 16 Sep 2020 16:11:53 -0700
Subject: dt-bindings: phy: qcom,qmp-usb3-dp: Add DP phy information
This binding only describes the USB phy inside the USB3 + DP "combo"
phy. Add information for the DP phy and describe the sub-nodes that
represent the DP and USB3 phys that exist inside the combo wrapper.
Remove reg-names from required properties because it isn't required nor
used by the kernel driver.
Signed-off-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Cc: Jeykumar Sankaran <jsanka@xxxxxxxxxxxxxx>
Cc: Chandan Uddaraju <chandanu@xxxxxxxxxxxxxx>
Cc: Vara Reddy <varar@xxxxxxxxxxxxxx>
Cc: Tanmay Shah <tanmay@xxxxxxxxxxxxxx>
Cc: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
Cc: Manu Gautam <mgautam@xxxxxxxxxxxxxx>
Cc: Sandeep Maheswaram <sanm@xxxxxxxxxxxxxx>
Cc: Douglas Anderson <dianders@xxxxxxxxxxxx>
Cc: Sean Paul <seanpaul@xxxxxxxxxxxx>
Cc: Jonathan Marek <jonathan@xxxxxxxx>
Cc: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
Cc: <devicetree@xxxxxxxxxxxxxxx>
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Cc: Rob Clark <robdclark@xxxxxxxxxxxx>
Link: https://lore.kernel.org/r/20200916231202.3637932-2-swboyd@xxxxxxxxxxxx
Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
---
.../bindings/phy/qcom,qmp-usb3-dp-phy.yaml | 95 ++++++++++++++++---
1 file changed, 84 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml
index ef8ae9f73092..33974ad10afe 100644
--- a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml
@@ -13,17 +13,21 @@ maintainers:
properties:
compatible:
enum:
+ - qcom,sc7180-qmp-usb3-dp-phy
- qcom,sc7180-qmp-usb3-phy
+ - qcom,sdm845-qmp-usb3-dp-phy
- qcom,sdm845-qmp-usb3-phy
reg:
items:
- - description: Address and length of PHY's common serdes block.
+ - description: Address and length of PHY's USB serdes block.
- description: Address and length of the DP_COM control block.
+ - description: Address and length of PHY's DP serdes block.
reg-names:
items:
- - const: reg-base
+ - const: usb
- const: dp_com
+ - const: dp
"#clock-cells":
enum: [ 1, 2 ]
@@ -74,16 +78,74 @@ properties:
#Required nodes:
patternProperties:
- "^phy@[0-9a-f]+$":
+ "^usb3-phy@[0-9a-f]+$":
type: object
description:
- Each device node of QMP phy is required to have as many child nodes as
- the number of lanes the PHY has.
+ The USB3 PHY.
+
+ properties:
+ reg:
+ items:
+ - description: Address and length of TX.
+ - description: Address and length of RX.
+ - description: Address and length of PCS.
+ - description: Address and length of TX2.
+ - description: Address and length of RX2.
+ - description: Address and length of pcs_misc.
+
+ clocks:
+ items:
+ - description: pipe clock
+
+ clock-names:
+ items:
+ - const: pipe0
+
+ clock-output-names:
+ items:
+ - const: usb3_phy_pipe_clk_src
+
+ '#clock-cells':
+ const: 0
+
+ '#phy-cells':
+ const: 0
+
+ required:
+ - reg
+ - clocks
+ - clock-names
+ - '#clock-cells'
+ - '#phy-cells'
+
+ "^dp-phy@[0-9a-f]+$":
+ type: object
+ description:
+ The DP PHY.
+
+ properties:
+ reg:
+ items:
+ - description: Address and length of TX.
+ - description: Address and length of RX.
+ - description: Address and length of PCS.
+ - description: Address and length of TX2.
+ - description: Address and length of RX2.
+
+ '#clock-cells':
+ const: 1
+
+ '#phy-cells':
+ const: 0
+
+ required:
+ - reg
+ - '#clock-cells'
+ - '#phy-cells'
required:
- compatible
- reg
- - reg-names
- "#clock-cells"
- "#address-cells"
- "#size-cells"
@@ -101,14 +163,15 @@ examples:
- |
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
usb_1_qmpphy: phy-wrapper@88e9000 {
- compatible = "qcom,sdm845-qmp-usb3-phy";
+ compatible = "qcom,sdm845-qmp-usb3-dp-phy";
reg = <0x088e9000 0x18c>,
- <0x088e8000 0x10>;
- reg-names = "reg-base", "dp_com";
+ <0x088e8000 0x10>,
+ <0x088ea000 0x40>;
+ reg-names = "usb", "dp_com", "dp";
#clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x0 0x088e9000 0x1000>;
+ ranges = <0x0 0x088e9000 0x2000>;
clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
@@ -123,7 +186,7 @@ examples:
vdda-phy-supply = <&vdda_usb2_ss_1p2>;
vdda-pll-supply = <&vdda_usb2_ss_core>;
- phy@200 {
+ usb3-phy@200 {
reg = <0x200 0x128>,
<0x400 0x200>,
<0xc00 0x218>,
@@ -136,4 +199,14 @@ examples:
clock-names = "pipe0";
clock-output-names = "usb3_phy_pipe_clk_src";
};
+
+ dp-phy@88ea200 {
+ reg = <0xa200 0x200>,
+ <0xa400 0x200>,
+ <0xaa00 0x200>,
+ <0xa600 0x200>,
+ <0xa800 0x200>;
+ #clock-cells = <1>;
+ #phy-cells = <0>;
+ };
};
--
2.28.0
