On Sun, 20 Sep 2020 14:29:13 +0300, Serge Semin wrote: > These controllers are based on the DW APB SSI IP-core and embedded into > the SoC, so two of them are equipped with IRQ, DMA, 64 words FIFOs and 4 > native CS, while another one as being utilized by the Baikal-T1 System > Boot Controller has got a very limited resources: no IRQ, no DMA, only a > single native chip-select and just 8 bytes Tx/Rx FIFOs available. That's > why we have to mark the IRQ to be optional for the later interface. > > The SPI controller embedded into the Baikal-T1 System Boot Controller can > be also used to directly access an external SPI flash by means of a > dedicated FSM. The corresponding MMIO region availability is switchable by > the embedded multiplexor, which phandle can be specified in the dts node. > > * We added a new example to test out the non-standard Baikal-T1 System > Boot SPI Controller DT binding. > > Co-developed-by: Ramil Zaripov <Ramil.Zaripov@xxxxxxxxxxxxxxxxxxxx> > Signed-off-by: Ramil Zaripov <Ramil.Zaripov@xxxxxxxxxxxxxxxxxxxx> > Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> > --- > .../bindings/spi/snps,dw-apb-ssi.yaml | 33 +++++++++++++++++-- > 1 file changed, 31 insertions(+), 2 deletions(-) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
