On Tue, 22 Sep 2020 at 12:56, Li Jun <jun.li@xxxxxxx> wrote:
>
> imx8mp integrates 2 identical dwc3 based USB3 controllers and
> Synopsys phys, each instance has additional wakeup logic to
> support low power mode, so the glue layer need a node with dwc3
> core sub node.
>
> Signed-off-by: Li Jun <jun.li@xxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 88 +++++++++++++++++++++++++++++++
> 1 file changed, 88 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 9de2aa1..1b7ed4c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -750,5 +750,93 @@
> reg = <0x3d800000 0x400000>;
> interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> };
> +
> + usb3_phy0: usb-phy@381f0040 {
> + compatible = "fsl,imx8mp-usb-phy";
> + reg = <0x381f0040 0x40>;
> + clocks = <&clk IMX8MP_CLK_USB_PHY_ROOT>;
> + clock-names = "phy";
> + assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>;
> + assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> +
> + usb3_0: usb@32f10100 {
> + compatible = "fsl,imx8mp-dwc3";
> + reg = <0x32f10100 0x8>;
> + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> + <&clk IMX8MP_CLK_USB_ROOT>;
> + clock-names = "hsio", "suspend";
> + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + status = "disabled";
> +
> + usb_dwc3_0: dwc3@38100000 {
> + compatible = "snps,dwc3";
> + reg = <0x38100000 0x10000>;
> + clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
> + <&clk IMX8MP_CLK_USB_CORE_REF>,
> + <&clk IMX8MP_CLK_USB_ROOT>;
> + clock-names = "bus_early", "ref", "suspend";
> + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
> + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
> + assigned-clock-rates = <500000000>;
> + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> + phys = <&usb3_phy0>, <&usb3_phy0>;
> + phy-names = "usb2-phy", "usb3-phy";
> + snps,dis-u2-freeclk-exists-quirk;
> + xhci-64bit-support-disable;
> + status = "disabled";
> + };
> +
> + };
> +
> + usb3_phy1: usb-phy@382f0040 {
> + compatible = "fsl,imx8mp-usb-phy";
> + reg = <0x382f0040 0x40>;
> + clocks = <&clk IMX8MP_CLK_USB_PHY_ROOT>;
> + clock-names = "phy";
> + assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>;
> + assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> +
> + usb3_1: usb@32f10108 {
> + compatible = "fsl,imx8mp-dwc3";
> + reg = <0x32f10108 0x8>;
> + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> + <&clk IMX8MP_CLK_USB_ROOT>;
> + clock-names = "hsio", "suspend";
> + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI_SRC>;
This does not validate against your own schema:
arch/arm64/boot/dts/freescale/imx8mp-evk.dt.yaml: usb@32f10108:
'assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' do
not match any of the regexes: '^dwc3@[0-9a-f]+$', 'pinctrl-[0-9]+'
Please, stop adding new schema and DTS which from day one have
warnings/violations.
It's really a lot of effort (and commits) to clean this up later.
Best regards,
Krzysztof
