v2 --> v3: 1. Move the marcos of Hisilicon 64-bit timer, such as HISI_TIMER_LOAD, from "drivers/clocksource/timer-sp.h" into "drivers/clocksource/timer-sp804.c", involved Patch7-8. 2. Because the DT binding of ARM SP-804 has been converted to json-schema recently, so rewrote Patch9, it based on below patch https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/patch/?id=a85a4aa32ab9568751b7aff8bd33e1b44b1cd3a1 3. Other patches have no chnage. v1 --> v2: 1. Split the Patch 3 of v1 into three patches: Patch 3-5 2. Change compatible "hisi,sp804" to "hisilicon,sp804" in Patch 7. 3. Add dt-binding description of "hisilicon,sp804", Patch 9 Other patches are not changed. v1: The ARM SP804 supports a maximum of 32-bit counter, but Hisilicon extends it to 64-bit. That means, the registers: TimerXload, TimerXValue and TimerXBGLoad are 64bits, all other registers are the same as those in the SP804. The driver code can be completely reused except that the register offset is different The register offset differences between ARM-SP804 and HISI-SP804 are as follows: ARM-SP804 HISI-SP804 TIMER_LOAD 0x00 HISI_TIMER_LOAD 0x00 HISI_TIMER_LOAD_H 0x04 TIMER_VALUE 0x04 HISI_TIMER_VALUE 0x08 HISI_TIMER_VALUE_H 0x0c TIMER_CTRL 0x08 HISI_TIMER_CTRL 0x10 TIMER_INTCLR 0x0c HISI_TIMER_INTCLR 0x14 TIMER_RIS 0x10 HISI_TIMER_RIS 0x18 TIMER_MIS 0x14 HISI_TIMER_MIS 0x1c TIMER_BGLOAD 0x18 HISI_TIMER_BGLOAD 0x20 HISI_TIMER_BGLOAD_H 0x24 TIMER_2_BASE 0x20 HISI_TIMER_2_BASE 0x40 ---------------- In order to make the timer-sp804 driver support both ARM-SP804 and HISI-SP804. Create a new structure "sp804_clkevt" to record the calculated registers address in advance, avoid judging and calculating the register address every place that is used. For example: struct sp804_timer arm_sp804_timer = { .ctrl = TIMER_CTRL, }; struct sp804_timer hisi_sp804_timer = { .ctrl = HISI_TIMER_CTRL, }; struct sp804_clkevt clkevt; In the initialization phase: if (hisi_sp804) clkevt.ctrl = base + hisi_sp804_timer.ctrl; else if (arm_sp804) clkevt.ctrl = base + arm_sp804_timer.ctrl; After initialization: - writel(0, base + TIMER_CTRL); + writel(0, clkevt.ctrl); ---------------- Additional information: These patch series are the V2 of https://lore.kernel.org/patchwork/cover/681876/ And many of the main ideas in https://lore.kernel.org/patchwork/patch/681875/ have been considered. Thanks for Daniel Lezcano's review comments. Kefeng Wang (1): clocksource: sp804: cleanup clk_get_sys() Zhen Lei (8): clocksource: sp804: remove unused sp804_timer_disable() and timer-sp804.h clocksource: sp804: delete the leading "__" of some functions clocksource: sp804: remove a mismatched comment clocksource: sp804: prepare for support non-standard register offset clocksource: sp804: support non-standard register offset clocksource: sp804: add support for Hisilicon sp804 timer clocksource: sp804: enable Hisilicon sp804 timer 64bit mode dt-bindings: sp804: add support for Hisilicon sp804 timer .../devicetree/bindings/timer/arm,sp804.yaml | 7 +- drivers/clocksource/timer-sp.h | 32 ++++ drivers/clocksource/timer-sp804.c | 210 ++++++++++++++------- include/clocksource/timer-sp804.h | 29 --- 4 files changed, 185 insertions(+), 93 deletions(-) delete mode 100644 include/clocksource/timer-sp804.h -- 1.8.3
