Modify NPCM7xx device tree timer register size from 0x50 to 0x1C. Signed-off-by: Tomer Maimon <tmaimon77@xxxxxxxxx> --- arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi index 16a28c5c4131..72e364054e72 100644 --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi @@ -120,7 +120,7 @@ timer0: timer@8000 { compatible = "nuvoton,npcm750-timer"; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x8000 0x50>; + reg = <0x8000 0x1C>; clocks = <&clk NPCM7XX_CLK_TIMER>; }; -- 2.22.0