Add a new clock definition for the "APLLdivN" as described in the AST2600 specification. This clock is simply the APLL divided by a factor defined in the SCU registers. It is the input to the FSI bus. Signed-off-by: Eddie James <eajames@xxxxxxxxxxxxx> --- include/dt-bindings/clock/ast2600-clock.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/ast2600-clock.h b/include/dt-bindings/clock/ast2600-clock.h index 62b9520a00fd..5a9ae0a1d574 100644 --- a/include/dt-bindings/clock/ast2600-clock.h +++ b/include/dt-bindings/clock/ast2600-clock.h @@ -87,6 +87,7 @@ #define ASPEED_CLK_MAC2RCLK 68 #define ASPEED_CLK_MAC3RCLK 69 #define ASPEED_CLK_MAC4RCLK 70 +#define ASPEED_CLK_APLLN 71 /* Only list resets here that are not part of a gate */ #define ASPEED_RESET_ADC 55 -- 2.26.2
