On 18:35-20200910, Vignesh Raghavendra wrote: > Hi, > > On 9/8/20 9:52 PM, Lokesh Vutla wrote: > > The J7200 SoC is a part of the K3 Multicore SoC architecture platform. > > It is targeted for automotive gateway, vehicle compute systems, > > Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. > > The SoC aims to meet the complex processing needs of modern embedded > > products. > > > > Some highlights of this SoC are: > > * Dual Cortex-A72s in a single cluster, two clusters of lockstep > > capable dual Cortex-R5F MCUs and a Centralized Device Management and > > Security Controller (DMSC). > > * Configurable L3 Cache and IO-coherent architecture with high data > > throughput capable distributed DMA architecture under NAVSS. > > * Integrated Ethernet switch supporting up to a total of 4 external ports > > in addition to legacy Ethernet switch of up to 2 ports. > > * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, > > 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C > > and I2C, eCAP/eQEP, eHRPWM among other peripherals. > > * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL > > management. > > > > See J7200 Technical Reference Manual (SPRUIU1, June 2020) > > for further details: https://www.ti.com/lit/pdf/spruiu1 > > > > Reviewed-by: Grygorii Strashko <grygorii.strashko@xxxxxx> > > Reviewed-by: Suman Anna <s-anna@xxxxxx> > > Signed-off-by: Lokesh Vutla <lokeshvutla@xxxxxx> > [...] > > + cbass_main: bus@100000 { > > + compatible = "simple-bus"; > > + #address-cells = <2>; > > + #size-cells = <2>; > > + ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ > > + <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ > > + <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* timesync router */ > > + <0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000>, /* Most peripherals */ > > + <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>, /* MAIN NAVSS */ > > + <0x00 0x70000000 0x00 0x70000000 0x00 0x00800000>, /* MSMC RAM */ Also: <0x00 0x18000000 0x00 0x18000000 0x00 0x08000000>, /* PCIe1 DAT0 */ > > + <0x41 0x00000000 0x41 0x00000000 0x01 0x00000000>, /* PCIe1 DAT */ Kishon: would it be nice to help DAT be DAT1 ? > > + > > + /* MCUSS_WKUP Range */ > > + <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, > > + <0x00 0x40200000 0x00 0x40200000 0x00 0x00998400>, > > + <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, > > + <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, > > + <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, > > + <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00100000>, > > + <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, > > + <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, > > + <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, > > + <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, > > + <0x00 0x50000000 0x00 0x50000000 0x00 0x10000000>; > > + > > + cbass_mcu_wakeup: bus@28380000 { > > + compatible = "simple-bus"; > > + #address-cells = <2>; > > + #size-cells = <2>; > > + ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, /* MCU NAVSS*/ > > + <0x00 0x40200000 0x00 0x40200000 0x00 0x00998400>, /* First peripheral window */ > > + <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */ > > + <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */ > > + <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */ > > + <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00100000>, /* MCU SRAM */ > > + <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP peripheral window */ > > + <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */ > > + <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */ > > + <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, /* OSPI register space */ > > + <0x00 0x50000000 0x00 0x50000000 0x00 0x10000000>; /* FSS OSPI0/1 data region 0 */ > > + }; > > + }; > > +}; > > + > > Could you pick up FSS region updates from [1] as Nishanth suggested? > > [1] > https://lore.kernel.org/linux-arm-kernel/20200807124407.12604-2-vigneshr@xxxxxx/ > > Regards > Vignesh -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
