The Amlogic AXG is close from the GXL Glue but with a single OTG PHY.
Signed-off-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
---
.../usb/amlogic,meson-g12a-usb-ctrl.yaml | 22 ++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
index 5b04a7dfa018..c0058332b967 100644
--- a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
+++ b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
@@ -25,13 +25,14 @@ description: |
The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in
host-only mode.
- The Amlogic GXL & GXM SoCs doesn't embed an USB3 PHY.
+ The Amlogic GXL, GXM & AXG SoCs doesn't embed an USB3 PHY.
properties:
compatible:
enum:
- amlogic,meson-gxl-usb-ctrl
- amlogic,meson-gxm-usb-ctrl
+ - amlogic,meson-axg-usb-ctrl
- amlogic,meson-g12a-usb-ctrl
- amlogic,meson-a1-usb-ctrl
@@ -151,6 +152,25 @@ allOf:
required:
- clock-names
+ - if:
+ properties:
+ compatible:
+ enum:
+ - amlogic,meson-axg-usb-ctrl
+
+ then:
+ properties:
+ phy-names:
+ items:
+ - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
+ clocks:
+ minItems: 2
+ clock-names:
+ items:
+ - const: usb_ctrl
+ - const: ddr
+ required:
+ - clock-names
- if:
properties:
compatible:
--
2.22.0
