From: Wasim Khan <wasim.khan@xxxxxxx>
Add label to pcie nodes
Signed-off-by: Wasim Khan <wasim.khan@xxxxxxx>
---
arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts | 2 +-
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 5 +++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts
index 9927b09..242f4b0 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts
@@ -87,7 +87,7 @@
status = "okay";
};
-&pcie {
+&pcie1 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index ff19ec4..6a2c091 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -1,8 +1,9 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * Device Tree Include file for Freescale Layerscape-1012A family SoC.
+ * Device Tree Include file for NXP Layerscape-1012A family SoC.
*
* Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2019-2020 NXP
*
*/
@@ -489,7 +490,7 @@
interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
};
- pcie: pcie@3400000 {
+ pcie1: pcie@3400000 {
compatible = "fsl,ls1012a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
0x40 0x00000000 0x0 0x00002000>; /* configuration space */
--
2.7.4
