Hi, On 08/09/2020 21:50, Rob Herring wrote: > On Mon, Sep 07, 2020 at 09:34:00AM +0200, Neil Armstrong wrote: >> The Amlogic AXG MIPI + PCIe Analog PHY should be a subnode of the hhi mfd >> node like the axg-clkc node. >> >> Thus the reg attribute is not needed. > > If the phy registers have an address then it should remain even if Linux > happens to not care. The exception is if the registers are all > interleaved with other stuff. This is not really a question about linux using it or not. The PHY registers happens to be at the beginning of a large zone containing interleaved system registers (mainly clocks, power management, PHY control..). The goal is to model it the same way as the other "features" of this zone, like Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt and Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml and have a coherent bindings scheme. Neil > >> >> Signed-off-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx> >> --- >> .../bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml | 4 ---- >> 1 file changed, 4 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml >> index 18c1ec5e19ad..a9040aa387cf 100644 >> --- a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml >> +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml >> @@ -13,15 +13,11 @@ properties: >> compatible: >> const: amlogic,axg-mipi-pcie-analog-phy >> >> - reg: >> - maxItems: 1 >> - >> "#phy-cells": >> const: 1 >> >> required: >> - compatible >> - - reg >> - "#phy-cells" >> >> additionalProperties: false >> -- >> 2.22.0 >>
