v2 --> v3: 1. change (1 << hwirq) to BIT(hwirq). 2. change __exception_irq_entry to __irq_entry, so we can "#include <linux/interrupt.h>" instead of "#include <asm/exception.h>". Ohterwise, an compilation error will be reported on arch/csky. drivers/irqchip/irq-dw-apb-ictl.c:20:10: fatal error: asm/exception.h: No such file or directory 3. use "if (!parent || (np == parent))" to determine whether it is primary interrupt controller. 4. make the primary interrupt controller case also use function handle_level_irq(), I used handle_fasteoi_irq() as flow_handler before. 5. Other minor changes are not detailed. v1 --> v2: According to Marc Zyngier's suggestion, discard adding an independent SD5203-VIC driver, but make the dw-apb-ictl irqchip driver to support hierarchy irq domain. It was originally available only for secondary interrupt controller, now it can also be used as primary interrupt controller. The related dt-bindings is updated appropriately. Add "Suggested-by: Marc Zyngier <maz@xxxxxxxxxx>". Add "Tested-by: Haoyu Lv <lvhaoyu@xxxxxxxxxx>". v1: The interrupt controller of SD5203 SoC is VIC(vector interrupt controller), it's based on Synopsys DesignWare APB interrupt controller (dw_apb_ictl) IP, but it can not directly use dw_apb_ictl driver. The main reason is that VIC is used as primary interrupt controller and dw_apb_ictl driver worked for secondary interrupt controller. So add a new driver: "hisilicon,sd5203-vic". Zhen Lei (3): irqchip: dw-apb-ictl: prepare for support hierarchy irq domain irqchip: dw-apb-ictl: support hierarchy irq domain dt-bindings: dw-apb-ictl: support hierarchy irq domain .../interrupt-controller/snps,dw-apb-ictl.txt | 14 ++- drivers/irqchip/Kconfig | 2 +- drivers/irqchip/irq-dw-apb-ictl.c | 85 ++++++++++++++++--- 3 files changed, 87 insertions(+), 14 deletions(-) -- 2.26.0.106.g9fadedd
