From: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx> The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on the eMMC-interface of the lxa-mc1. Set it in the device tree to benefit from the speed improvement. Signed-off-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx> Signed-off-by: Holger Assmann <h.assmann@xxxxxxxxxxxxxx> --- arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts b/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts index b85025d00943..1e5333fd437f 100644 --- a/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts +++ b/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts @@ -212,6 +212,7 @@ pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>; pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>; bus-width = <8>; + mmc-ddr-3_3v; no-1-8-v; no-sd; no-sdio; -- 2.20.1
