Re: [PATCH 0/3] SiFive DDR controller and EDAC support

[Palmer Dabbelt <palmer@xxxxxxxxxxx>]

On Tue, 25 Aug 2020 09:19:58 PDT (-0700), bp@xxxxxxxxx wrote:
> On Tue, Aug 25, 2020 at 09:02:54AM -0700, Palmer Dabbelt wrote:
> > Thanks.  These look good to me and I'm happy to take them through the RISC-V
> > tree, but I'm going to wait for a bit to see if there are any comments from the
> > maintainers of the various subsystems before doing so.
>
> I'll have a look at the EDAC bits these days and give you an ACK if
> they're ok.

Thanks!