Hi Cristi, On Wed, Aug 19, 2020 at 07:37:55PM +0300, Cristian Ciocaltea wrote: > This patch series adds support for the external interrupt controller > (SIRQ) found in the Actions Semi Owl family of SoC's (S500, S700 and > S900). The controller handles up to 3 external interrupt lines through > dedicated SIRQ pins. > > This is a rework of the patch series submitted some time ago by > Parthiban Nallathambi: > https://lore.kernel.org/lkml/20181126100356.2840578-1-pn@xxxxxxx/ > You need to preserve the authorship while reposting the patches. If you'd like to take the authorship intentionally then please explain the reason in cover letter. Thanks, Mani > Please note I have dropped, for the moment, the S700 related patches > since I do not own a compatible hardware for testing. I'm using instead > an S500 SoC based board for which I have already provided the initial > support: > https://lore.kernel.org/lkml/cover.1592123160.git.cristian.ciocaltea@xxxxxxxxx/ > > The SIRQ controller support is a prerequisite of the soon to be submitted > MFD driver for the Actions Semi ATC260x PMICs. > > Thanks and regards, > Cristi > > Changes in v5: > - Integrated Marc's review (more details in the driver patch changelog) > - Rebased patch series on v5.9-rc1 > > Changes in v4: > - Simplified the DTS structure: > * dropped 'actions,sirq-shared-reg' node, now the differentiation > between SoC variants is handled now via the compatible property > * dropped 'actions,sirq-reg-offset', now controller base address in > DTS points to SIRQ0 register, so no additional information is > required for S500 and S700, while for S900 SoC the offsets of SIRQ1 > and SIRQ2 regs are provided by the driver > * 'actions,ext-irq-range' was replaced with 'actions,ext-interrupts', > an array of the GIC interrupts triggered by the controller > - Fixed wrong INTC_EXTCTL_TYPE_MASK definition > - Removed redundant irq_fwspec checks in owl_sirq_domain_alloc() > - Improved error handling in owl_sirq_of_init() > - Added yaml binding document > - Dropped S700 related DTS patches for lack of testing hardware: > * arm64: dts: actions: Add sirq node for Actions Semi S700 > * arm64: dts: actions: s700-cubieboard7: Enable SIRQ > - Updated MAINTAINERS > - Rebased patchset on kernel v5.8 > - Cosmetic changes > * Ordered include statements alphabetically > * Added comment to owl_sirq_set_type() describing conversion of falling > edge or active low signals > * Replaced IRQF_TRIGGER_* with corresponding IRQ_TYPE_* variants > * Ensured data types and function naming are consistent regarding the > 'owl_sirq' prefix > > Changes in v3 (Parthiban Nallathambi): > - Set default operating frequency to 24MHz > - Falling edge and Low Level interrupts translated to rising edge and high level > - Introduced common function with lock handling for register read and write > - Used direct GIC interrupt number for interrupt local hwirq and finding offset > using DT entry (range) when registers are shared > - Changed irq_ack to irq_eoi > - Added translation method for irq_domain_ops > - Clearing interrupt pending based on bitmask for edge triggered > - Added pinctrl definition for sirq for cubieboard7. This depends on, > https://lore.kernel.org/patchwork/patch/1012859/ > > Changes in v2 (Parthiban Nallathambi): > - Added SIRQ as hierarchical chip > GIC <----> SIRQ <----> External interrupt controller/Child devices > - Device binding updates with vendor prefix > - Register sharing handled globally and common init sequence/data for all > actions SoC family > > Cristian Ciocaltea (3): > dt-bindings: interrupt-controller: Add Actions SIRQ controller binding > irqchip: Add Actions Semi Owl SIRQ controller > MAINTAINERS: Add entries for Actions Semi Owl SIRQ controller > > .../actions,owl-sirq.yaml | 68 ++++ > MAINTAINERS | 2 + > drivers/irqchip/Makefile | 1 + > drivers/irqchip/irq-owl-sirq.c | 347 ++++++++++++++++++ > 4 files changed, 418 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml > create mode 100644 drivers/irqchip/irq-owl-sirq.c > > -- > 2.28.0 >
