On 20:03-20200819, Suman Anna wrote:
> Add the required 'mboxes' property to both the C66x DSP processors on the
> TI J721E common processor board. The mailboxes and some shared memory
I am not sure I understand the logic here. The carveout is added to
p0 SOM - and the mbox is added to common_proc_board. I am not sure I
get the difference. The C66x processors are on the SoC, stack is as
follows: - SoC - SoM - Common Proc board
I am just wondering if the carveouts and mbox linkage should be in the
common processor board? if that makes sense at all? I know we already
have other definitions.. Trying to see if we are making it harder to
understand the definition than that is necessary..
> are required for running the Remote Processor Messaging (RPMsg) stack
> between the host processor and each of the R5Fs. The chosen sub-mailboxes
> match the values used in the current firmware images. This can be changed,
> if needed, as per the system integration needs after making appropriate
> changes on the firmware side as well.
>
> Signed-off-by: Suman Anna <s-anna@xxxxxx>
> ---
> arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> index e8fc01d97ada..ff541dc09eca 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> @@ -379,6 +379,14 @@ &mailbox0_cluster11 {
> status = "disabled";
> };
>
> +&c66_0 {
> + mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
> +};
> +
> +&c66_1 {
> + mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
> +};
> +
> &main_sdhci0 {
> /* eMMC */
> non-removable;
> --
> 2.28.0
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
