On 03/08/2020 14:13, Krzysztof Kozlowski wrote: > On Wed, Jul 29, 2020 at 02:47:33PM +0100, Guillaume Tucker wrote: >> Use the standard l2c2x0 device tree bindings to enable data and >> instruction prefetch on exynos4210 and exynos4412 and clear the >> respective bits in the default l2c_aux_val. No other Exynos platform >> relying on this default register value appears to be using the l2x0 >> cache. >> >> Signed-off-by: Guillaume Tucker <guillaume.tucker@xxxxxxxxxxxxx> >> --- >> arch/arm/boot/dts/exynos4210.dtsi | 2 ++ >> arch/arm/boot/dts/exynos4412.dtsi | 2 ++ >> arch/arm/mach-exynos/exynos.c | 4 ++-- > > I will need these split between DTS and mach changes. Of course, sorry. Fixed in v2. Thanks, Guillaume
