+Srinivas and the ST list.
> On some platforms existing 100 msecond delay is not enough for DMA block to
> recover after reset. This is because MAC DMA waits for all PHY input clocks
> to present and depending on the board reset bit deassertion may take much
> longer than previously used 100 milliseconds
>
> I have a board that requires more than 2 seconds for DMA to zero "reset" bit.
> If for other boards it's still not long enough this value should be extended
> once again.
>
> In the same change I convert "mdelay" to "msleep" to make CPU available for
> other processes during DMA init delay which is especially useful in case of
> delay for a few seconds.
>
> Signed-off-by: Alexey Brodkin <abrodkin@xxxxxxxxxxxx>
>
> Cc: David S. Miller <davem@xxxxxxxxxxxxx>
> Cc: Hans de Goede <hdegoede@xxxxxxxxxx>
> Cc: Giuseppe Cavallaro <peppe.cavallaro@xxxxxx>
> Cc: Chen-Yu Tsai <wens@xxxxxxxx>
> Cc: linux-kernel@xxxxxxxxxxxxxxx
> Cc: devicetree@xxxxxxxxxxxxxxx
> Cc: Vineet Gupta <vgupta@xxxxxxxxxxxx>
> ---
> drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c | 4 ++--
> drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
> index 0c2058a..f713ea7 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
> @@ -39,11 +39,11 @@ static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
> /* DMA SW reset */
> value |= DMA_BUS_MODE_SFT_RESET;
> writel(value, ioaddr + DMA_BUS_MODE);
> - limit = 10;
> + limit = 100;
> while (limit--) {
> if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))
> break;
> - mdelay(10);
> + msleep(25);
> }
> if (limit < 0)
> return -EBUSY;
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
> index 7d1dce9..043585f 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
> @@ -41,11 +41,11 @@ static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
> /* DMA SW reset */
> value |= DMA_BUS_MODE_SFT_RESET;
> writel(value, ioaddr + DMA_BUS_MODE);
> - limit = 10;
> + limit = 100;
> while (limit--) {
> if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))
> break;
> - mdelay(10);
> + msleep(25);
> }
> if (limit < 0)
> return -EBUSY;
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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