On Wed, 04 Jun 2014, Gabriel FERNANDEZ wrote: > The patch added support for DT registration of ClockGenC0 > It includes 2 c32 type PLL and a 660 Quadfs. > > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@xxxxxxxxxx> > Signed-off-by: Olivier Bideau <olivier.bideau@xxxxxx> > --- > drivers/clk/st/clkgen-fsyn.c | 47 ++++++++++++++++++++++++++++++++++++++++++++ > drivers/clk/st/clkgen-pll.c | 32 ++++++++++++++++++++++++++++++ > 2 files changed, 79 insertions(+) Acked-by: Peter Griffin <peter.griffin@xxxxxxxxxx> Regards, Peter -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
