HI,
On Fri, Jul 24, 2020 at 12:54 AM Maxime Ripard <maxime@xxxxxxxxxx> wrote:
>
> Hi,
>
> On Tue, Jul 14, 2020 at 03:20:29PM +0800, Frank Lee wrote:
> > From: Yangtao Li <frank@xxxxxxxxxxxxxxxxx>
> >
> > Allwinner A100 is a new SoC with Cortex-A53 cores, this commit adds
> > the basical DTSI file of it, including the clock, i2c, pins, sid, ths,
> > nmi, and UART support.
> >
> > Signed-off-by: Yangtao Li <frank@xxxxxxxxxxxxxxxxx>
> > ---
> > .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 364 ++++++++++++++++++
> > 1 file changed, 364 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
> > new file mode 100644
> > index 000000000000..3fb2443f2121
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
> > @@ -0,0 +1,364 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
> > +/*
> > + * Copyright (c) 2020 Yangtao Li <frank@xxxxxxxxxxxxxxxxx>
> > + */
> > +
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +#include <dt-bindings/clock/sun50i-a100-ccu.h>
> > +#include <dt-bindings/clock/sun50i-a100-r-ccu.h>
> > +#include <dt-bindings/reset/sun50i-a100-ccu.h>
> > +#include <dt-bindings/reset/sun50i-a100-r-ccu.h>
> > +
> > +/ {
> > + interrupt-parent = <&gic>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu0: cpu@0 {
> > + compatible = "arm,armv8";
>
> You should use the arm,cortex-a53 compatible here, arm,armv8 is for
> software models.
>
> > + sid@3006000 {
>
> The node name is supposed to be the class of the device, and the DT spec
> defines a list of them already. eeprom would be better suited here.
EFuse is more accurate?
Thx,
Yangtao
