On 16/07/2020 06:04, Hanks Chen wrote:
On Tue, 2020-07-14 at 20:14 +0200, Matthias Brugger wrote:
On 14/07/2020 11:20, Hanks Chen wrote:
this adds initial MT6779 dts settings for board support,
including cpu, gic, timer, ccf, pinctrl, uart, sysirq...etc.
Signed-off-by: Hanks Chen <hanks.chen@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
arch/arm64/boot/dts/mediatek/mt6779-evb.dts | 31 +++
arch/arm64/boot/dts/mediatek/mt6779.dtsi | 271 ++++++++++++++++++++
3 files changed, 303 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6779-evb.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt6779.dtsi
[...]
+
+ uart0: serial@11002000 {
+ compatible = "mediatek,mt6779-uart",
+ "mediatek,mt6577-uart";
+ reg = <0 0x11002000 0 0x400>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART0>;
+ clock-names = "baud", "bus";
+ status = "disabled";
+ };
+
+ uart1: serial@11003000 {
+ compatible = "mediatek,mt6779-uart",
+ "mediatek,mt6577-uart";
+ reg = <0 0x11003000 0 0x400>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART1>;
+ clock-names = "baud", "bus";
+ status = "disabled";
+ };
+
+ uart2: serial@11004000 {
+ compatible = "mediatek,mt6779-uart",
+ "mediatek,mt6577-uart";
+ reg = <0 0x11004000 0 0x400>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART2>;
+ clock-names = "baud", "bus";
+ status = "disabled";
+ };
Devicetree describes the HW we have. As far as I know, we have 4 UARTs on
MT6779. So we should list them all here.
Actually, We have only 3 UARTs HW on MT6779, but have 4 UART clk in
header file of clk.
Correct, I got confused by the four clocks.
With that clarified I'm fine with the patch and will take it as soon as the
clock driver patch is accepted.
Regards,
Matthias
CLK_INFRA_UART3 is a dummy clk interface, it has no effect on the
operation of the read/write instruction.
If you think it is not good, I can remove it in the header file of clk.
Thanks
Regards,
Matthias
