Re: [PATCH v3 2/2] arm64: tegra: Add the GPU on Tegra194

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On 17/07/2020 09:36, Thierry Reding wrote:
> From: Thierry Reding <treding@xxxxxxxxxx>
> 
> The GPU found on NVIDIA Tegra194 SoCs is a Volta generation GPU called
> GV11B.
> 
> Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
> ---
> Changes in v3:
> - mark the GPU as DMA coherent because that's enforced by the MSS
> - add FUSE clock which is needed during GPU initialization
> - enable GPU by default
> 
>  arch/arm64/boot/dts/nvidia/tegra194.dtsi | 34 ++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> index 98c366ab4aab..48160f48003a 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -1395,6 +1395,40 @@ sor3: sor@15bc0000 {
>  				nvidia,interface = <3>;
>  			};
>  		};
> +
> +		gpu@17000000 {
> +			compatible = "nvidia,gv11b";
> +			reg = <0x17000000 0x10000000>,
> +			      <0x18000000 0x10000000>;
> +			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "stall", "nonstall";
> +			clocks = <&bpmp TEGRA194_CLK_GPCCLK>,
> +				 <&bpmp TEGRA194_CLK_GPU_PWR>,
> +				 <&bpmp TEGRA194_CLK_FUSE>;
> +			clock-names = "gpu", "pwr", "fuse";
> +			resets = <&bpmp TEGRA194_RESET_GPU>;
> +			reset-names = "gpu";
> +			dma-coherent;
> +
> +			power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>;
> +			interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVL1R &emc>,
> +					<&mc TEGRA194_MEMORY_CLIENT_NVL1RHP &emc>,
> +					<&mc TEGRA194_MEMORY_CLIENT_NVL1W &emc>,
> +					<&mc TEGRA194_MEMORY_CLIENT_NVL2R &emc>,
> +					<&mc TEGRA194_MEMORY_CLIENT_NVL2RHP &emc>,
> +					<&mc TEGRA194_MEMORY_CLIENT_NVL2W &emc>,
> +					<&mc TEGRA194_MEMORY_CLIENT_NVL3R &emc>,
> +					<&mc TEGRA194_MEMORY_CLIENT_NVL3RHP &emc>,
> +					<&mc TEGRA194_MEMORY_CLIENT_NVL3W &emc>,
> +					<&mc TEGRA194_MEMORY_CLIENT_NVL4R &emc>,
> +					<&mc TEGRA194_MEMORY_CLIENT_NVL4RHP &emc>,
> +					<&mc TEGRA194_MEMORY_CLIENT_NVL4W &emc>;
> +			interconnect-names = "dma-mem", "read-0-hp", "write-0",
> +					     "read-1", "read-1-hp", "write-1",
> +					     "read-2", "read-2-hp", "write-2",
> +					     "read-3", "read-3-hp", "write-3";
> +		};
>  	};
>  
>  	pcie@14100000 {
> 


Reviewed-by: Jon Hunter <jonathanh@xxxxxxxxxx>

Cheers
Jon

-- 
nvpublic



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