On Fri, Jun 26, 2020 at 08:39:05PM +0200, Daniel González Cabanelas wrote:
> The marvell PHY reg-init registers for the D-Link DNS-327L are wrong.
> Currently the first field is used to set the page 2, but this is
> pointless. The usage is not correct, and we are setting the wrong
> registers.
>
> Fix it.
>
> Signed-off-by: Daniel González Cabanelas <dgcbueu@xxxxxxxxx>
> ---
> arch/arm/boot/dts/armada-370-dlink-dns327l.dts | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> index baa459dd5..2008c6eaa 100644
> --- a/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> +++ b/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
> @@ -247,9 +247,8 @@ &uart1 {
> &mdio {
> phy0: ethernet-phy@0 { /* Marvell 88E1318 */
> reg = <0>;
> - marvell,reg-init = <0x0 0x16 0x0 0x0002>,
Interesting. That is writing to the page register, to change to page
2! So this might of worked with an earlier implementation. But not
now.
> - <0x0 0x19 0x0 0x0077>,
> - <0x0 0x18 0x0 0x5747>;
> + marvell,reg-init = <0x2 0x19 0x0 0x0077>,
> + <0x2 0x18 0x0 0x5747>;
Reviewed-by: Andrew Lunn <andrew@xxxxxxx>
Andrew
