On Wed, May 28, 2014 at 01:27:23PM -0500, Kumar Gala wrote:
> * Move SoC peripherals into an SoC container node
> * Move serial enabling into board file (qcom-msm8960-cdp.dts)
> * Cleanup cpu node to match binding spec, enable-method and compatible
> should be per cpu, not part of the container
> * Drop interrupts property from l2-cache node as its not part of the
> binding spec
>
> Signed-off-by: Kumar Gala <galak@xxxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/qcom-msm8960-cdp.dts | 6 ++
> arch/arm/boot/dts/qcom-msm8960.dtsi | 165 +++++++++++++++++----------------
> 2 files changed, 93 insertions(+), 78 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts
> index a58fb88..8e77ed7 100644
> --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts
> +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts
> @@ -3,4 +3,10 @@
> / {
> model = "Qualcomm MSM8960 CDP";
> compatible = "qcom,msm8960-cdp", "qcom,msm8960";
> +
> + soc {
> + serial@16440000 {
> + status = "ok";
> + };
> + };
> };
Is now the time put these serial nodes under a GSBI parent node?
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