On Mon Jun 22 2020, Andrew Lunn wrote: > On Mon, Jun 22, 2020 at 02:02:19PM +0200, Kurt Kanzenbach wrote: >> On Fri Jun 19 2020, Andrew Lunn wrote: >> >> > The switch is 100/100Mbps right? The MAC is only Fast ethernet. Do you >> >> > need some properties in the port@0 node to tell the switch to only use >> >> > 100Mbps? I would expect it to default to 1G. Not looked at the code >> >> > yet... >> >> >> >> No, that is not needed. That is a hardware configuration and AFAIK >> >> cannot be changed at run time. >> > >> > I was wondering about that in general. I did not spot any code in the >> > driver dealing with results from the PHY auto-neg. So you are saying >> > the CPU is fixed speed, by strapping? But what about the other ports? >> > Does the MAC need to know the PHY has negotiated 10Half, not 1G? Would >> > that not make a difference to your TSN? >> >> Indeed, that does make a difference. I've checked with the vendor. The >> current version of the switch IP does not support configuring the speed >> etc. at run time. It is hard wired to 100 Mbit/s or 1000 Mbit/s for >> now. Later versions of the chip might support setting the speed etc. via >> configuration registers. As a result the PHYs at the front ports should >> be programmed to only advertise 100 Mbit/s or 1G depending on the >> hardware setup. > > Hi Kurt > > Are there registers which allow you to determine the strapping? No, there are not. > There are phylib/phylink calls you can make to set the advertisement > in the PHY. It would be good to do this in the DSA driver. I will. All the chips currently available are configured to 100 Mbit/s. So, we can assume that for now. Thanks, Kurt
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