On Mon, Jun 22, 2020 at 03:27:47PM -0700, Bjorn Andersson wrote: > The IPCC hardware block provides a mechanism for triggering interrupts > between co-processors in recent Qualcomm SoCs. This is used as basis for > most form of communication between co-processors, so enable this > support. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> Thanks, Mani > --- > arch/arm64/configs/defconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig > index 5848799dcad0..b3d13e1a052a 100644 > --- a/arch/arm64/configs/defconfig > +++ b/arch/arm64/configs/defconfig > @@ -834,6 +834,7 @@ CONFIG_IMX_MBOX=y > CONFIG_PLATFORM_MHU=y > CONFIG_BCM2835_MBOX=y > CONFIG_QCOM_APCS_IPC=y > +CONFIG_QCOM_IPCC=y > CONFIG_ROCKCHIP_IOMMU=y > CONFIG_TEGRA_IOMMU_SMMU=y > CONFIG_ARM_SMMU=y > -- > 2.26.2 >
