Hi All,
On Fri, 2020-06-12 at 19:13 +0200, Nicolas Saenz Julienne wrote:
> The chip is hardwired to the board's PCIe bus and needs to be properly
> setup trough a firmware routine after a PCI fundamental reset. Pass the
> reset controller phandle that takes care of triggering the
> initialization to the relevant PCI device.
>
> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@xxxxxxx>
> Reviewed-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
>
> ---
>
> Changes since v2:
> - Use dt-bindings to access IDs
>
> Changes since v1:
> - Update to match new binding
>
> arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
> b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
> index 0cef95058fb0..e20979013414 100644
> --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
> +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
> @@ -4,6 +4,8 @@
> #include "bcm2835-rpi.dtsi"
> #include "bcm283x-rpi-usb-peripheral.dtsi"
>
> +#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
> +
> / {
> compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
> model = "Raspberry Pi 4 Model B";
> @@ -207,6 +209,13 @@ phy1: ethernet-phy@1 {
> };
> };
>
> +&pcie0 {
> + usb@1,0 {
> + reg = <0 0 0 0 0>;
> + resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
> + };
> +};
> +
I'm now double-guessing this is correct. With this lspci -tv output:
[0000:00]---00.0-[01]----00.0 VIA Technologies, Inc. VL805 USB 3.0 Host Controller
The DT patch should be more like this:
+&pcie0 {
+ pci@0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+
+ reg = <0 0 0 0 0>;
+
+ usb@1,0 {
+ reg = <0x10000 0 0 0 0>;
+ resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
+ };
+ };
+};
Small details aside I'm pretty confident this is the way to go, but would
appreciate some comments/validation.
Regards,
Nicolas
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