The USB PHY provides the optimized for low power dissipation while active, idle, or on standby. Requires minimal external components, a single resistor, for best operation. Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable --- v4: - Andy's review comments addressed - drop the excess error debug prints - error check optimized - merge the split line to one line v3: - Andy's review comments update - hardcode return value changed to actual return value from the callee - add error check is fixed according to the above - correct the assignment in redundant - combine the split line into one line v2: - Address Phillip's review comments - replace devm_reset_control_get() by devm_reset_control_get_exclusive() - re-design the assert and deassert fucntion calls as per review comments - address kbuild bot warnings - add the comments v1: - initial version --- dt-bindings: usb: Add USB PHY support for Intel LGM SoC v4: - No Change v3: - No Change v2: - No Change v1: - initial version Ramuthevar Vadivel Murugan (2): dt-bindings: usb: Add USB PHY support for Intel LGM SoC usb: phy: Add USB3 PHY support for Intel LGM SoC .../devicetree/bindings/usb/intel,lgm-usb-phy.yaml | 53 ++++ drivers/usb/phy/Kconfig | 11 + drivers/usb/phy/Makefile | 1 + drivers/usb/phy/phy-lgm-usb.c | 275 +++++++++++++++++++++ 4 files changed, 340 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/intel,lgm-usb-phy.yaml create mode 100644 drivers/usb/phy/phy-lgm-usb.c -- 2.11.0
