From: Daniele Alessandrelli <daniele.alessandrelli@xxxxxxxxx>
Add initial device tree for Keem Bay EVM board. With this minimal device
tree the board boots fine using an initramfs image.
Reviewed-by: Dinh Nguyen <dinguyen@xxxxxxxxxx>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@xxxxxxxxx>
---
MAINTAINERS | 1 +
arch/arm64/boot/dts/intel/Makefile | 1 +
arch/arm64/boot/dts/intel/keembay-evm.dts | 55 +++++++++++++++++++++++
3 files changed, 57 insertions(+)
create mode 100644 arch/arm64/boot/dts/intel/keembay-evm.dts
diff --git a/MAINTAINERS b/MAINTAINERS
index 610907bf391b..d714762e805c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1959,6 +1959,7 @@ M: Paul J. Murphy <paul.j.murphy@xxxxxxxxx>
M: Daniele Alessandrelli <daniele.alessandrelli@xxxxxxxxx>
S: Maintained
F: Documentation/devicetree/bindings/arm/keembay.yaml
+F: arch/arm64/boot/dts/intel/keembay-evm.dts
F: arch/arm64/boot/dts/intel/keembay-soc.dtsi
F: include/dt-bindings/clock/keembay-clocks.h
F: include/dt-bindings/power/keembay-power.h
diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
index 40cb16e8c814..296eceec4276 100644
--- a/arch/arm64/boot/dts/intel/Makefile
+++ b/arch/arm64/boot/dts/intel/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
dtb-$(CONFIG_ARCH_AGILEX) += socfpga_agilex_socdk.dtb \
socfpga_agilex_socdk_nand.dtb
+dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb
diff --git a/arch/arm64/boot/dts/intel/keembay-evm.dts b/arch/arm64/boot/dts/intel/keembay-evm.dts
new file mode 100644
index 000000000000..46859763cb03
--- /dev/null
+++ b/arch/arm64/boot/dts/intel/keembay-evm.dts
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2020, Intel Corporation
+ *
+ * Device tree describing Keem Bay EVM board.
+ */
+
+/dts-v1/;
+
+#include "keembay-soc.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Keem Bay EVM";
+ compatible = "intel,keembay-evm";
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart3;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ /* 2GB of DDR memory. */
+ reg = <0x0 0x80000000 0x0 0x80000000>;
+ };
+
+ sysmem@84000000 {
+ compatible = "mmio-sram";
+ reg = <0x0 0x84000000 0x0 0x800000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0 0x0 0x0 0x84000000 0x0 0x800000>;
+ /*
+ * Allocate 1MB at fixed location for shared memory between
+ * non-secure world and BL31 to be used for SCMI.
+ */
+ scmi_sec_shmem: scmi_sec_shmem@0 {
+ compatible = "arm,scmi-shmem";
+ reg = <0x0 0x0 0x0 0x100000>;
+ pool;
+ };
+ };
+};
+
+&uart3 {
+ status = "okay";
+};
--
2.26.2
