From: Paul Murphy <paul.j.murphy@xxxxxxxxx> These are the bindings required for the Intel Keem Bay SCMI mailbox driver. Reviewed-by: Dinh Nguyen <dinguyen@xxxxxxxxxx> Signed-off-by: Paul Murphy <paul.j.murphy@xxxxxxxxx> --- .../mailbox/intel,keembay-scmi-mailbox.yaml | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/intel,keembay-scmi-mailbox.yaml diff --git a/Documentation/devicetree/bindings/mailbox/intel,keembay-scmi-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/intel,keembay-scmi-mailbox.yaml new file mode 100644 index 000000000000..149294dd8141 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/intel,keembay-scmi-mailbox.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2020 Intel Corporation +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/mailbox/intel,keembay-scmi-mailbox.yaml#"; +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; + +title: Intel Keem Bay SCMI mailbox + +maintainers: + - Paul Murphy <paul.j.murphy@xxxxxxxxx> + +description: | + The Intel Keem Bay SCMI mailbox is used to communicate SCMI messages to the + runtime service in BL31 behaving as the SCMI 'SCP'. + Refer to ./mailbox.txt for generic information about mailbox device-tree + bindings. + For more information about SCMI, refer to the bindings described in + Documentation/devicetree/bindings/arm/arm,scmi.txt + +properties: + compatible: + enum: + - intel,keembay-scmi-mailbox + + "#mbox-cells": + const: 1 + + memory-region: + description: + Memory region describing the SCMI shared memory + +required: + - compatible + - "#mbox-cells" + - memory-region + +examples: + - | + scmi_mailbox: scmi_mailbox { + compatible = "intel,keembay-scmi-mailbox"; + #mbox-cells = <1>; + memory-region = <&scmi_sec_shmem>; + }; -- 2.26.2
