From: Thierry Reding <treding@xxxxxxxxxx> Signed-off-by: Thierry Reding <treding@xxxxxxxxxx> --- .../memory-controllers/nvidia,tegra186-mc.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml index 611bda38d187..581572fe3077 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml @@ -38,6 +38,16 @@ properties: interrupts: maxItems: 1 + "#interconnect-cells": + const: 1 + description: + Each interconnect node for the memory controller takes a phandle to the + memory controller and a single cell as the specifier, identifying the + memory client by its ID. + + For a list of valid IDs, see dt-bindings/memory/tegra186-mc.h and + dt-bindings/memory/tegra194-mc.h. + "#address-cells": const: 2 -- 2.24.1