On Thu, Jun 04, 2020 at 02:28:19PM -0700, Florian Fainelli wrote: > The 4 SPI controller instances added in BCM2711 and BCM7211 SoCs (SPI3, > SPI4, SPI5 and SPI6) share the same interrupt line with SPI0. > > For the BCM2835 case which is deemed performance critical, we would like > to continue using an interrupt handler which does not have the extra > comparison on BCM2835_SPI_CS_INTR. > > To support that requirement the common interrupt handling code between > the shared and non-shared interrupt paths is split into a > bcm2835_spi_interrupt_common() and both bcm2835_spi_interrupt() as well > as bcm2835_spi_shared_interrupt() make use of it. > > During probe, we determine if there is at least another instance of this > SPI controller, and if there is, then we install a shared interrupt > handler. > > Signed-off-by: Florian Fainelli <f.fainelli@xxxxxxxxx> Reviewed-by: Lukas Wunner <lukas@xxxxxxxxx>
