The following commit has been merged into the timers/core branch of tip: Commit-ID: 7d7de1a65349811b24971c5e8e040e6aac192dd4 Gitweb: https://git.kernel.org/tip/7d7de1a65349811b24971c5e8e040e6aac192dd4 Author: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> AuthorDate: Thu, 21 May 2020 23:48:17 +03:00 Committer: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> CommitterDate: Sat, 23 May 2020 00:03:16 +02:00 clocksource: mips-gic-timer: Mark GIC timer as unstable if ref clock changes Currently clocksource framework doesn't support the clocks with variable frequency. Since MIPS GIC timer ticks rate might be unstable on some platforms, we must make sure that it justifies the clocksource requirements. MIPS GIC timer is incremented with the CPU cluster reference clocks rate. So in case if CPU frequency changes, the MIPS GIC tick rate changes synchronously. Due to this the clocksource subsystem can't rely on the timer to measure system clocks anymore. This commit marks the MIPS GIC based clocksource as unstable if reference clock (normally it's a CPU reference clocks) rate changes. The clocksource will execute a watchdog thread, which lowers the MIPS GIC timer rating to zero and fallbacks to a new stable one. Note we don't need to set the CLOCK_SOURCE_MUST_VERIFY flag to the MIPS GIC clocksource since normally the timer is stable. The only reason why it gets unstable is due to the ref clock rate change, which event we detect here in the driver by means of the clocks event notifier. Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> Cc: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx> Cc: Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx> Cc: Paul Burton <paulburton@xxxxxxxxxx> Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> Cc: Alessandro Zummo <a.zummo@xxxxxxxxxxxx> Cc: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxx> Cc: Arnd Bergmann <arnd@xxxxxxxx> Cc: Rob Herring <robh+dt@xxxxxxxxxx> Cc: linux-mips@xxxxxxxxxxxxxxx Cc: linux-rtc@xxxxxxxxxxxxxxx Cc: devicetree@xxxxxxxxxxxxxxx Signed-off-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> Link: https://lore.kernel.org/r/20200521204818.25436-9-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx --- drivers/clocksource/Kconfig | 1 + drivers/clocksource/mips-gic-timer.c | 19 ++++++++++++++++++- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index c824002..9141838 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -570,6 +570,7 @@ config CLKSRC_VERSATILE config CLKSRC_MIPS_GIC bool depends on MIPS_GIC + select CLOCKSOURCE_WATCHDOG select TIMER_OF config CLKSRC_TANGO_XTAL diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c index ef12c12..be4175f 100644 --- a/drivers/clocksource/mips-gic-timer.c +++ b/drivers/clocksource/mips-gic-timer.c @@ -24,6 +24,9 @@ static DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device); static int gic_timer_irq; static unsigned int gic_frequency; +static bool __read_mostly gic_clock_unstable; + +static void gic_clocksource_unstable(char *reason); static u64 notrace gic_read_count_2x32(void) { @@ -125,8 +128,10 @@ static int gic_clk_notifier(struct notifier_block *nb, unsigned long action, { struct clk_notifier_data *cnd = data; - if (action == POST_RATE_CHANGE) + if (action == POST_RATE_CHANGE) { + gic_clocksource_unstable("ref clock rate change"); on_each_cpu(gic_update_frequency, (void *)cnd->new_rate, 1); + } return NOTIFY_OK; } @@ -172,6 +177,18 @@ static struct clocksource gic_clocksource = { .vdso_clock_mode = VDSO_CLOCKMODE_GIC, }; +static void gic_clocksource_unstable(char *reason) +{ + if (gic_clock_unstable) + return; + + gic_clock_unstable = true; + + pr_info("GIC timer is unstable due to %s\n", reason); + + clocksource_mark_unstable(&gic_clocksource); +} + static int __init __gic_clocksource_init(void) { unsigned int count_width;
