On Fri, May 29, 2020 at 08:43:12PM +0300, Andy Shevchenko wrote: > On Fri, May 29, 2020 at 08:26:42PM +0300, Serge Semin wrote: > > On Fri, May 29, 2020 at 06:18:32PM +0100, Mark Brown wrote: > > > On Fri, 29 May 2020 16:11:49 +0300, Serge Semin wrote: > > > > Baikal-T1 SoC provides a DW DMA controller to perform low-speed peripherals > > > > Mem-to-Dev and Dev-to-Mem transaction. This is also applicable to the DW > > > > APB SSI devices embedded into the SoC. Currently the DMA-based transfers > > > > are supported by the DW APB SPI driver only as a middle layer code for > > > > Intel MID/Elkhart PCI devices. Seeing the same code can be used for normal > > > > platform DMAC device we introduced a set of patches to fix it within this > > > > series. > > > As you can see it has been acked by Rob. So you can also merge it into your > > repo. Though It has to be rebased first due to the Dinh Nguyen patches > > recently merged in. Do you want me to do the rebasing? > > I guess now you need to rebase it, because as I see the Dinh's patches are in > the tree as well as yours. Right. That's what I am doing at the moment.) -Sergey > > -- > With Best Regards, > Andy Shevchenko > >
