On Fri, May 29, 2020 at 01:29:02PM +0300, Andy Shevchenko wrote: > On Fri, May 29, 2020 at 01:25:15PM +0300, Andy Shevchenko wrote: > > On Fri, May 29, 2020 at 01:23:59AM +0300, Serge Semin wrote: > > > According to the DW APB DMAC data book the minimum burst transaction > > > length is 1 and it's true for any version of the controller since > > > isn't parametrised in the coreAssembler so can't be changed at the > > > IP-core synthesis stage. Let's initialise the min_burst member of the > > > DMA controller descriptor so the DMA clients could use it to properly > > > optimize the DMA requests. > > ... > > > > /* DMA capabilities */ > > > > > + dw->dma.min_burst = 1; > > > > Perhaps then relaxed maximum, like > > > > dw->dma.max_burst = 256; > > > > (channels will update this) > > > > ? > > And forgot to mention that perhaps we need a definitions for both. By "definitions for both" do you mean a macro with corresponding parameter definition like it's done for the max burst length in the next patch? Something like this: --- include/linux/platform_data/dma-dw.h +++ include/linux/platform_data/dma-dw.h +#define DW_DMA_MIN_BURST 1 +#define DW_DMA_MAX_BURST 256 ? -Sergey > > > > dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS; > > > dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS; > > -- > With Best Regards, > Andy Shevchenko > >
