On Thu, 28 May 2020 16:57:54 +0200 Miquel Raynal <miquel.raynal@xxxxxxxxxxx> wrote: > Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx> wrote on Thu, 28 May > 2020 16:34:24 +0200: > > > On Thu, 28 May 2020 13:31:09 +0200 > > Miquel Raynal <miquel.raynal@xxxxxxxxxxx> wrote: > > > > > Prepare the migration to the generic ECC framework by adding more > > > fields to the nand_ecc_props structure which will be used widely to > > > describe different kind of ECC properties. > > > > > > Doing this imposes to move the engine type, ECC placement and > > > algorithm enumerations in a shared place: nand.h. > > > > > > Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx> > > > --- > > > include/linux/mtd/nand.h | 52 +++++++++++++++++++++++++++++++++++++ > > > include/linux/mtd/rawnand.h | 44 ------------------------------- > > > 2 files changed, 52 insertions(+), 44 deletions(-) > > > > > > diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h > > > index 6add464fd18b..2e9af24936cd 100644 > > > --- a/include/linux/mtd/nand.h > > > +++ b/include/linux/mtd/nand.h > > > @@ -127,14 +127,66 @@ struct nand_page_io_req { > > > int mode; > > > }; > > > > > > +/** > > > + * enum nand_ecc_engine_type - NAND ECC engine type > > > + * @NAND_ECC_ENGINE_TYPE_INVALID: Invalid value > > > + * @NAND_ECC_ENGINE_TYPE_NONE: No ECC correction > > > + * @NAND_ECC_ENGINE_TYPE_SOFT: Software ECC correction > > > + * @NAND_ECC_ENGINE_TYPE_ON_HOST: On host hardware ECC correction > > > + * @NAND_ECC_ENGINE_TYPE_ON_DIE: On chip hardware ECC correction > > > + */ > > > +enum nand_ecc_engine_type { > > > + NAND_ECC_ENGINE_TYPE_INVALID, > > > + NAND_ECC_ENGINE_TYPE_NONE, > > > + NAND_ECC_ENGINE_TYPE_SOFT, > > > + NAND_ECC_ENGINE_TYPE_ON_HOST, > > > + NAND_ECC_ENGINE_TYPE_ON_DIE, > > > +}; > > > + > > > +/** > > > + * enum nand_ecc_placement - NAND ECC bytes placement > > > + * @NAND_ECC_PLACEMENT_UNKNOWN: The actual position of the ECC bytes is unknown > > > + * @NAND_ECC_PLACEMENT_OOB: The ECC bytes are located in the OOB area > > > + * @NAND_ECC_PLACEMENT_INTERLEAVED: Syndrome layout, there are ECC bytes > > > + * interleaved with regular data in the main > > > + * area > > > + */ > > > +enum nand_ecc_placement { > > > + NAND_ECC_PLACEMENT_UNKNOWN, > > > + NAND_ECC_PLACEMENT_OOB, > > > + NAND_ECC_PLACEMENT_INTERLEAVED, > > > +}; > > > + > > > +/** > > > + * enum nand_ecc_algo - NAND ECC algorithm > > > + * @NAND_ECC_ALGO_UNKNOWN: Unknown algorithm > > > + * @NAND_ECC_ALGO_HAMMING: Hamming algorithm > > > + * @NAND_ECC_ALGO_BCH: Bose-Chaudhuri-Hocquenghem algorithm > > > + * @NAND_ECC_ALGO_RS: Reed-Solomon algorithm > > > + */ > > > +enum nand_ecc_algo { > > > + NAND_ECC_ALGO_UNKNOWN, > > > + NAND_ECC_ALGO_HAMMING, > > > + NAND_ECC_ALGO_BCH, > > > + NAND_ECC_ALGO_RS, > > > +}; > > > + > > > /** > > > * struct nand_ecc_props - NAND ECC properties > > > + * @engine_type: ECC engine type > > > + * @placement: OOB placement (if relevant) > > > + * @algo: ECC algorithm (if relevant) > > > * @strength: ECC strength > > > * @step_size: Number of bytes per step > > > + * @flags: Misc properties > > > > I'd like to hear more about that one. What is this about? I'd rather > > not add a field if it's not needed. > > > > It is used in patch 18/18 to store the NAND_ECC_MAXIMIZE flag. And I > expect others to come later... Then I think it should be introduced in this patch, not here.