Quoting Nishanth Menon (2014-05-16 03:45:57) > Hi, > > This patch series has been carried over in vendor kernel for quiet > few years now. > > Unfortunately, it was very recently re-discovered and upstream kernel > is noticed to be broken for OMAP5 1.5GHz - at least we are operating > DPLL at frequency higher than what it was intended to be when CPUFreq > is enabled. Thankfully, with nominal voltage(we dont use AVS yet in > upstream for the mentioned platforms) and margins in trimming, we > have so far not crashed - but I strongly suspect this might be some > boundary case survival. DCC also exists in OMAP4. In some cases customers used it, in other cases we just ran the PLL way out of spec and the mpu_clk would divide by 2. Is this broken for OMAP4 as well? Regards, Mike > > Verified on the following impacted platforms using 3.15-rc4 based > vendor kernel. > > Before: > OMAP5432: http://slexy.org/view/s20cs0qQFg > DRA72x: http://slexy.org/view/s2TXtSa6mH (refused to lock) > DRA75x: http://slexy.org/view/s20AW8MU5c > After: > OMAP5432: http://slexy.org/view/s21iAfWxpu > DRA72x: http://slexy.org/view/s2hwsvGLmC (locks properly) > DRA75x: http://slexy.org/view/s21ehw8WQn > > Hopefully, we can get these into some kernel revision in some form. > > NOTE: Support for 4470(which is the only other platform requiring > DCC) is not present in upstream kernel and there are no plans to > support that SoC, even if it is added at a later point, support can be > extended as needed. > > Series based on v3.15-rc5 tag. > Also available on my tree: > https://github.com/nmenon/linux-2.6-playground/ > branch: push/clock/dcc > > weblink: https://github.com/nmenon/linux-2.6-playground/commits/push/clock/dcc > > Verification: > 3.15-rc4 based kernel - DRA75x-evm, 72x-evm, OMAP5uevm > 3.15-rc5 - OMAP5uEVM(only one supporting 1.5GHz atm) > > Andrii Tseglytskyi (1): > ARM: OMAP5+: dpll: support Duty Cycle Correction(DCC) > > Nishanth Menon (2): > clk: dpll: support OMAP5 MPU DPLL that need special handling for > higher frequencies > ARM: dts: OMAP5/DRA7: use omap5-mpu-dpll-clock capable of dealing > with higher frequencies > > .../devicetree/bindings/clock/ti/dpll.txt | 1 + > arch/arm/boot/dts/dra7xx-clocks.dtsi | 2 +- > arch/arm/boot/dts/omap54xx-clocks.dtsi | 2 +- > arch/arm/mach-omap2/dpll3xxx.c | 9 +++++++++ > drivers/clk/ti/dpll.c | 21 ++++++++++++++++++++ > include/linux/clk/ti.h | 4 ++++ > 6 files changed, 37 insertions(+), 2 deletions(-) > > Regards, > Nishanth Menon > -- > 1.7.9.5 > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
