Quoting Sivaprakash Murugesan (2020-05-24 03:04:38) > The CPU on Qualcomm's IPQ6018 devices are primarily fed by APSS PLL and XO, > these are connected to a clock mux and enable block. > > This patch series adds support for these clocks and inturn enables clocks > required for CPU freq. What is your intended merge path? You sent this to qcom SoC maintainers, mailbox maintainers, and clk maintainers. Who is supposed to apply the series? Should it be split up and taken through various trees? Are there dependencies? Please add more details to help us.
