On 21/05/2020 22:48, Serge Semin wrote: > As for all Baikal-T1 SoC related patchsets, which need this, we replaced > the DW APB Timer legacy plain text-based dt-binding file with DT schema. > Similarly the MIPS GIC bindings file is also converted to DT schema seeing > it also defines the MIPS GIC Timer binding. > > Aside from MIPS-specific r4k timer Baikal-T1 chip also provides a > functionality of two another timers: embedded into the MIPS GIC timer and > three external DW timers available over APB bus. But we can't use them > before the corresponding drivers are properly fixed. First of all DW APB > Timer shouldn't be bound to a single CPU, since as being accessible over > APB they are external with respect to all possible CPUs. Secondly there > might be more than just two DW APB Timers in the system (Baikal-T1 has > three of them), so permit the driver to use one of them as a clocksource > and the rest - for clockevents. Thirdly it's possible to use MIPS GIC > timer as a clocksource so register it in the corresponding subsystem > (the patch has been found in the Paul Burton MIPS repo so I left the > original Signed-off-by attribute). Finally in the same way as r4k timer > the MIPS GIC timer should be used with care when CPUFREQ config is enabled > since in case of CM2 the timer counting depends on the CPU reference clock > frequency while the clocksource subsystem currently doesn't support the > timers with non-stable clock. > > This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4: > base-commit: 0e698dfa2822 ("Linux 5.7-rc4") > tag: v5.7-rc4 Applied patch 1,2,4,5,6,7,8 Thanks! -- Daniel -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog