On Wed, May 13, 2020 at 2:55 PM Lars Povlsen <lars.povlsen@xxxxxxxxxxxxx> wrote: > > This patch series adds support for Microchip Sparx5 SoC, the CPU > system of a advanced, TSN capable gigabit switch. The CPU is an armv8 > x 2 CPU core (A53). > > Although this is an ARM core, it shares some peripherals with the > Microsemi Ocelot SoC. > > This is the first official revision of the series. I see you sent multiple series to soc@xxxxxxxxxx for review. This is the correct address for getting the initial soc support merged, but as the patches are still being reviewed by subsystem maintainers, please leave it off for now, until you are confident that they are ready to get merged for the following merge window and have received the appropriate Acks. For each subsystem, there is generally the choice between merging code through the subsystem maintainer tree, or through the soc tree on an initial submission, as going through multiple trees is particularly hard to do for the devicetree files. For the moment, I have marked all sparx5 patches as "Not Applicable" in patchwork at https://patchwork.kernel.org/project/linux-soc/list/ as it is still unclear who is merging which parts, and they are under active review, but please do send them again after the review is complete. If you have a lot of patches, sending pull requests is sometimes easier, but it also takes a bit of practice to know how exactly to structure those. Let me know if you have questions about them. You an also contact me and most of the other maintainers on IRC using the #armlinux channel on irc.freenode.net. Sorry for not having been able to review the patches myself yet, I hope to get to that soon. Arnd
