> From: Anson Huang <Anson.Huang@xxxxxxx>
> Sent: Wednesday, May 20, 2020 2:03 PM
>
> Convert the i.MX thermal binding to DT schema format using json-schema
>
> Signed-off-by: Anson Huang <Anson.Huang@xxxxxxx>
> ---
> Changes since V1:
> - move tempmon node into its parent node anatop in example;
> - improve "fsl,tempmon" description.
> ---
> .../devicetree/bindings/thermal/imx-thermal.txt | 61 -------------
> .../devicetree/bindings/thermal/imx-thermal.yaml | 100
[...]
> +title: NXP i.MX Thermal Binding
> +
> +maintainers:
> + - Shawn Guo <shawn.guo@xxxxxxxxxx>
> + - Anson Huang <Anson.Huang@xxxxxxx>
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
Drop Unnecessary properties
> + - enum:
> + - fsl,imx6q-tempmon
> + - fsl,imx6sx-tempmon
> + - fsl,imx7d-tempmon
> +
> + interrupts:
> + description: |
> + The interrupt output of the controller, the IRQ will be triggered
> + when temperature is higher than high threshold.
> + maxItems: 1
You'd better explain why interrupts number is changed in the new binding compared to
the original one. Probably add in commit message if really needed.
> +
> + nvmem-cells:
> + description: |
> + Phandle to the calibration cells provided by ocotp for calibration
> + data and temperature grade.
Better describe for each of them as you did for clocks
> + maxItems: 2
> +
> + nvmem-cell-names:
> + maxItems: 2
> + items:
> + - const: calib
> + - const: temp_grade
> +
> + fsl,tempmon:
> + $ref: '/schemas/types.yaml#/definitions/phandle'
> + description: Phandle to the register map node.
What register map? A bit ambiguous..
Regards
Aisheng
> +
> + fsl,tempmon-data:
> + $ref: '/schemas/types.yaml#/definitions/phandle'
> + description: |
> + Deprecated property, phandle pointer to fuse controller that contains
> + TEMPMON calibration data, e.g. OCOTP on imx6q. The details about
> + calibration data can be found in SoC Reference Manual.
> + deprecated: true
> +
> + clocks:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - interrupts
> + - fsl,tempmon
> + - nvmem-cells
> + - nvmem-cell-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/imx6sx-clock.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + efuse@21bc000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,imx6sx-ocotp", "syscon";
> + reg = <0x021bc000 0x4000>;
> + clocks = <&clks IMX6SX_CLK_OCOTP>;
> +
> + tempmon_calib: calib@38 {
> + reg = <0x38 4>;
> + };
> +
> + tempmon_temp_grade: temp-grade@20 {
> + reg = <0x20 4>;
> + };
> + };
> +
> + anatop@20c8000 {
> + compatible = "fsl,imx6q-anatop", "syscon", "simple-mfd";
> + reg = <0x020c8000 0x1000>;
> + interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
> + <0 54 IRQ_TYPE_LEVEL_HIGH>,
> + <0 127 IRQ_TYPE_LEVEL_HIGH>;
> +
> + tempmon {
> + compatible = "fsl,imx6sx-tempmon";
> + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> + fsl,tempmon = <&anatop>;
> + nvmem-cells = <&tempmon_calib>,
> <&tempmon_temp_grade>;
> + nvmem-cell-names = "calib", "temp_grade";
> + clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
> + };
> + };
> --
> 2.7.4
