This patchset enables the clk handling in power domain for working as per the recommended power domain on / off sequence for exynos5 SoCs. I have posted an RFC for the same [1] and didnt get any review comments / objections. So I am dropping the RFC tag and posting the patch along with the required clk and dt support. [1] https://www.mail-archive.com/linux-samsung-soc@xxxxxxxxxxxxxxx/msg30479.html Arun Kumar K (2): clk: exynos5420: Add IDs for clocks used in PD mfc ARM: dts: Add clock property for mfc_pd in 5420 Prathyush K (1): ARM: EXYNOS: Add support for clock handling in power domain .../bindings/arm/exynos/power_domain.txt | 18 +++++++ arch/arm/boot/dts/exynos5420.dtsi | 3 ++ arch/arm/mach-exynos/pm_domains.c | 56 +++++++++++++++++++- drivers/clk/samsung/clk-exynos5420.c | 6 ++- include/dt-bindings/clock/exynos5420.h | 2 + 5 files changed, 82 insertions(+), 3 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
