> From: Anson Huang <Anson.Huang@xxxxxxx> > Sent: Thursday, May 14, 2020 2:54 PM > > Convert the imx pwm binding to DT schema format using json-schema. > > Signed-off-by: Anson Huang <Anson.Huang@xxxxxxx> > --- > Documentation/devicetree/bindings/pwm/imx-pwm.txt | 27 --------- > Documentation/devicetree/bindings/pwm/imx-pwm.yaml | 66 > ++++++++++++++++++++++ > 2 files changed, 66 insertions(+), 27 deletions(-) delete mode 100644 > Documentation/devicetree/bindings/pwm/imx-pwm.txt > create mode 100644 > Documentation/devicetree/bindings/pwm/imx-pwm.yaml > > diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.txt > b/Documentation/devicetree/bindings/pwm/imx-pwm.txt > deleted file mode 100644 > index 22f1c3d..0000000 > --- a/Documentation/devicetree/bindings/pwm/imx-pwm.txt > +++ /dev/null > @@ -1,27 +0,0 @@ > -Freescale i.MX PWM controller > - > -Required properties: > -- compatible : should be "fsl,<soc>-pwm" and one of the following > - compatible strings: > - - "fsl,imx1-pwm" for PWM compatible with the one integrated on i.MX1 > - - "fsl,imx27-pwm" for PWM compatible with the one integrated on i.MX27 > -- reg: physical base address and length of the controller's registers > -- #pwm-cells: 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml > - in this directory for a description of the cells format. > -- clocks : Clock specifiers for both ipg and per clocks. > -- clock-names : Clock names should include both "ipg" and "per" > -See the clock consumer binding, > - Documentation/devicetree/bindings/clock/clock-bindings.txt > -- interrupts: The interrupt for the pwm controller > - > -Example: > - > -pwm1: pwm@53fb4000 { > - #pwm-cells = <3>; > - compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; > - reg = <0x53fb4000 0x4000>; > - clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, > - <&clks IMX5_CLK_PWM1_HF_GATE>; > - clock-names = "ipg", "per"; > - interrupts = <61>; > -}; > diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml > b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml > new file mode 100644 > index 0000000..4b62af2 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml > @@ -0,0 +1,66 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > +--- > +$id: > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevice > +tree.org%2Fschemas%2Fpwm%2Fimx-pwm.yaml%23&data=02%7C01% > 7Caisheng.d > +ong%40nxp.com%7C9b5cc1814a4b47d1cb0d08d7f7d4f594%7C686ea1d3bc > 2b4c6fa92c > +d99c5c301635%7C0%7C0%7C637250366331627865&sdata=M2RPcty > wz61WZrpAW6S > +O3NJbr2wj2qXwnMMmBwCbInk%3D&reserved=0 > +$schema: > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevice > +tree.org%2Fmeta-schemas%2Fcore.yaml%23&data=02%7C01%7Caishen > g.dong% > +40nxp.com%7C9b5cc1814a4b47d1cb0d08d7f7d4f594%7C686ea1d3bc2b4c > 6fa92cd99c > +5c301635%7C0%7C0%7C637250366331627865&sdata=UxgYSClanyOjt > BmlyNrMZyF > +3%2F5awD%2FM3yaVPqgNKgxs%3D&reserved=0 > + > +title: Freescale i.MX PWM controller > + > +maintainers: > + - Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> > + > +properties: > + "#pwm-cells": > + description: | > + Should be 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml > + in this directory for a description of the cells format. Should we add the reference to pwm.yaml? BTW, strange, I didn't see format description in pwm.yaml. > + enum: > + - 2 > + - 3 > + > + compatible: > + enum: > + - fsl,imx1-pwm > + - fsl,imx27-pwm > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: SoC PWM ipg clock > + - description: SoC PWM per clock > + maxItems: 2 > + > + clock-names: > + items: > + - const: ipg > + - const: per > + maxItems: 2 > + > + interrupts: > + maxItems: 1 > + > +required: > + - "#pwm-cells" > + - compatible > + - reg > + - clocks > + - clock-names > + - interrupts > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/imx5-clock.h> > + > + pwm@53fb4000 { > + #pwm-cells = <3>; > + compatible = "fsl,imx27-pwm"; > + reg = <0x53fb4000 0x4000>; > + clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, > + <&clks IMX5_CLK_PWM1_HF_GATE>; > + clock-names = "ipg", "per"; > + interrupts = <61>; > + }; > -- > 2.7.4